Teacher

prof. David ESSENI

Credits

6 CFU

Language

Italian

Objectives

The class aims at illustrating the operating principles, the design methodologies, and the performance of digital circuit blocks, of electronic components for digital applications and of their interconnections.

Acquired skills

- To understand the terminology and the specifications of digital circuits.
- To identify the technology and the design style best suited to implement a given digital circuit.
- To analise and design interconnects for digital circuits.
- To analise and design simple digital circuit blocks.
- To understand and use simple CAD tools for circuit design.
- To define the design flow of simple digital circuits.

Lectures and exercises (topics and specific content)

The logical effort design methodology: definition of the model; applications; optimization of chains of digital blocks; branching; forks (10 hours).
Interconnects: scaling rules for interconnects; capacitive models of an interconnect; RC models of interconnects; Elmore's formula; inductive effects; lossless transmission lines; terminatino techniques (10 hours).
Semiconductor memories: classification; internal organization; ROM; SRAM; DRAM; Non volatile memories (EPROM, EEPROM, FLASH (8 hours).
Latch and registers:  working principle and circuit implementation of latches and registers in CMOS technology (6 hours).
Arithmetic circuit: digital adders (6 hours).
Solved problems:  solution and discussion of home-works and written exams from previous academic years (10 hours).
Simulation by means of Orcad of digital circuits (10 hours).

References

- D. Esseni, Fondamenti di Circuiti Digitali Integrati CMOS, SGEditoriali, Padova, ITALY
- J. M. Rabaey, Digital Integrated Circuits: a design perspective, Prentice Hall
- I. Sutherland, B.Sproull, D.Harris, Logical Effort Designing Fast CMOS Circuits, Morgan Kaufmann
- J. M. Smith, Application Specific Integrated Circuits, Addison Wesley, 1997

Type of exam

Written and oral

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